(China (Mainland))
Product Summary
The MPC8548EVUAUJ features one Serializer/Deserializer (SerDes) interface to be used for high-speed serial interconnect applications. The SerDes interface can be used for PCI Express and/or serial RapidIO data transfers. This section describes the common portion of SerDes DC electrical specifications, which is the DC requirement for SerDes reference clocks. The SerDes data lane’s transmitter and receiver reference circuits are also shown. This section provides the AC and DC electrical specifications and thermal characteristics for the MPC8548E. This device is currently targeted to these specifications. Some of these specifications are independent of the I/O cell, but are included for a more complete reference. These are not purely I/O buffer design specifications.
Parametrics
Absolute maximum ratings:(1)Core supply voltage, VDD: –0.3 to 1.21V; (2)PLL supply voltage, AVDD: –0.3 to 1.21V; (3)Core power supply for SerDes transceivers, SVDD –0.3 to 1.21V; (4)Pad power supply for SerDes transceivers, XVDD –0.3 to 1.21V; (5)DDR and DDR2 DRAM I/O voltage, GVDD: –0.3 to 2.75V; (6)PCI/PCI-X, DUART, system control and power management, I2C, Ethernet MII management, and JTAG I/O voltage, OVDD: –0.3 to 3.63V; (7)Local bus I/O voltage, BVDD: –0.3 to 3.63V; (8)DDR/DDR2 DRAM signals, MVIN: –0.3 to (GVDD + 0.3)V; (9)DDR/DDR2 DRAM reference, MVREF: –0.3 to (GVDD/2 + 0.3)V; (10)Three-speed Ethernet I/O signals, LVIN–0.3 to (LVDD + 0.3): 0.3 to (TVDD + 0.3); (11)Local bus signals, BVIN: –0.3 to (BVDD + 0.3); (12)DUART, SYSCLK, system control and power management, I2C, Ethernet MII management, and JTAG signals, OVIN: –0.3 to (OVDD + 0.3)V; (13)PCI/PCI-X, OVIN: –0.3 to (OVDD + 0.3)V.
Features
Features: (1)Minimum baud rate, fCCB/1,048,576; (2)Maximum baud rate, fCCB/16; (3)Oversample rate, 16.
Diagrams
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 MPC8548EVUAUJ |
Freescale Semiconductor |
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